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64-bit CPUs have been common in RISC-based servers since the mid-1990s, and starting in 2003 began to be introduced to the (previously 32-bit) mainstream personal computer arena in the form of the x86-64 and 64-bit PowerPC processor architectures. Although a CPU may be 64-bit internally, its external data bus or address bus may have a different size, either larger or smaller, and the term is often used to describe the size of these buses as well. For instance, many current machines with 32-bit processors use 64-bit buses (e.g. the original Pentium and later CPUs), and may occasionally be referred to as "64-bit" for this reason. The term may also refer to the size of an instruction in the computer's instruction set or to any other item of data (e.g. 64-bit double-precision floating-point quantities are common). Without further qualification, however, a computer architecture described as "64-bit" generally has integer registers that are 64 bits wide and thus directly supports dealing both internally and externally with 64-bit "chunks" of integer data. Architectural implications Registers in a processor are generally divided into three groups: integer, floating point, and other. In all common general purpose processors, only the integer registers are capable of storing pointer values (that is, an address of some data in memory). The non-integer registers cannot be used to store pointers for the purpose of reading or writing to memory, and therefore cannot be used to bypass any memory restrictions imposed by the size of the integer registers. Nearly all common general purpose processors (with the notable exception of most ARM and 32-bit MIPS implementations) have integrated floating point hardware, which may or may not use 64 bit registers to hold data for processing. For example, the x86 architecture includes the x87 floating-point instructions which use 8 80-bit registers in a stack configuration; later revisions of x86, and the x86-64 architecture, also include SSE instructions, which use 8 128-bit wide registers (16 registers in x86-64). By contrast, the 64-bit Alpha family of processors defines 32 64-bit wide floating point registers in addition to its 32 64-bit wide integer registers. Memory limitations Most CPUs are currently (as of 2005) designed so that the contents of a single integer register can store the address (location) of any datum in the computer's virtual memory. Therefore, the total number of addresses in the virtual memory — the total amount of data the computer can keep in its working area — is determined by the width of these registers. Beginning in the 1960s with the IBM System/360, then (amongst many others) the DEC VAX minicomputer in the 1970s, and then with the Intel 80386 in the mid-1980s, a de facto consensus developed that 32 bits was a convenient register size. A 32-bit register meant that 232 addresses, or 4 gigabytes of RAM, could be referenced. At the time these architectures were devised, 4 gigabytes of memory was so far beyond the typical quantities available in installations that this was considered to be enough "headroom" for addressing. 4-gigabyte addresses were considered an appropriate size to work with for another important reason: 4 billion integers are enough to assign unique references to most physically countable things in applications like databases. However, with the march of time and the continual reductions in the cost of memory (see Moore's Law), by the early 1990s installations with quantities of RAM approaching 4 gigabytes began to appear, and the use of virtual memory spaces exceeding the 4-gigabyte ceiling became desirable for handling certain types of problems. In response, a number of companies began releasing new families of chips with 64-bit architectures, initially for supercomputers and high-end workstation and server machines. 64-bit computing has gradually drifted down to the personal computer desktop, with some models in Apple Computer's Macintosh lines switching to PowerPC 970 processors (termed "G5" by Apple) in 2003 and to 64-bit EM64T processors in 2006, and with x86-64 processors becoming common in high-end PCs. The emergence of the 64-bit architecture effectively increases the memory ceiling to 264 addresses, equivalent to 17,179,869,184 gigabytes or 16 exabytes of RAM. To put this in perspective, in the days when a mere 4 MB of main memory was commonplace, the maximum memory ceiling of 232 addresses was about 1000 times larger than typical memory configurations. Taking today's standard as 4 GB of main memory (actually, few personal computers have this much), then the difference between today's standard and the 264 limit is a factor of about 4 billion. Most 64-bit consumer PCs on the market today have an artificial limit on the amount of memory they can recognize, because physical constraints make it highly unlikely that one will need support for the full 16 exabyte capacity. Apple's Mac Pro, for example, can be physically configured with up to 16 gigabytes of memory, and as such there is no need for support beyond that amount. A recent Linux kernel (version 2.6.16) can be compiled with support for up to 64 gigabytes of memory. 64-bit microprocessor timeline 32 vs 64 bit A change from a 32-bit to a 64-bit architecture is a fundamental alteration, as most operating systems must be extensively modified to take advantage of the new architecture. Other software must also be ported to use the new capabilities; older software is usually supported through either a hardware compatibility mode (in which the new processors support the older 32-bit version of the instruction set as well as the 64-bit version), through software emulation, or by the actual implementation of a 32-bit processor core within the 64-bit processor die (as with the Itanium processors from Intel, which include an x86 processor core to run 32-bit x86 applications). The operating systems for those 64-bit architectures generally support both 32-bit and 64-bit applications. One significant exception to this is the AS/400, whose software runs on a virtual ISA, called TIMI (Technology Independent Machine Interface) which is translated to native machine code by low-level software before being executed. The low-level software is all that has to be rewritten to move the entire OS and all software to a new platform, such as when IBM transitioned their line from the older 32/48-bit "IMPI" instruction set to 64-bit PowerPC (IMPI wasn't anything like 32-bit PowerPC, so this was an even bigger transition than from a 32-bit version of an instruction set to a 64-bit version of the same instruction set). While 64-bit architectures indisputably make working with huge data sets in applications such as digital video, scientific computing, and large databases easier, there has been considerable debate as to whether they or their 32-bit compatibility modes will be faster than comparably-priced 32-bit systems for other tasks. In x86-64 architecture (AMD64 and EM64T, IA-32e), the majority of the 32-bit operating systems and applications are able to run smoothly on the 64-bit hardware. Sun's 64-bit Java virtual machines are slower to start up than their 32-bit virtual machines because Sun still assumes that all 64-bit machines are servers, and have only implemented the "server" compiler (C2) for 64-bit platforms. The "client" compiler (C1) produces slower code, but compiles much faster. So although a Java program on a 64-bit JVM may perform better over a long period (typical for long-running "server" applications), its start-up time is likely to be much longer. For short-lived applications (such as javac) the increased start-up time can dominate the run time, making the 64-bit JVM slower overall. (Since a 64-bit motherboard can and usually does accommodate more memory, the extra memory requirements are not the major problem.) It should be noted that speed is not the only factor to consider in a comparison of 32-bit and 64-bit processors. Applications such as multi-tasking, stress testing, and clustering (for HPC) may be more suited to a 64-bit architecture given the correct deployment. 64-bit clusters have been widely deployed in large organizations such as IBM, Vodafone, HP, Microsoft for this reason. Pros and cons A common misconception is that 64-bit architectures are no better than 32-bit architectures unless the computer has more than 4 GiB of memory. This is not entirely true: The main disadvantage of 64-bit architectures is that relative to 32-bit architectures the same data occupies slightly more space in memory (due to swollen pointers and possibly other types and alignment padding). This increases the memory requirements of a given process and can have implications for efficient processor cache utilization. Maintaining a partial 32-bit model is one way to handle this and is in general reasonably effective. In fact, the highly performance-oriented z/OS operating system takes this approach currently, requiring program code to reside in any number of 31-bit address spaces while data objects can (optionally) reside in 64-bit regions. Currently, most commercial software is built as 32-bit code, not 64-bit code, so it can't take advantage of the larger 64-bit address space or wider 64-bit registers and data paths on 64-bit processors, or, on x86 processors, the additional registers in 64-bit mode. Not all such applications require a large address space or manipulate 64-bit data items, so they wouldn't benefit from the larger address space or wider registers and data paths; the main benefit to 64-bit versions of applications that wouldn't benefit from them would be that x86 versions would be able to use more registers. Linux: 64-bit Linux has become more common in recent years. While finding prepackaged binaries for 64-bit systems has been a problem for some users, many Linux software packages can simply be compiled from source to work in a 64-bit environment. Gentoo Linux supports a very robust 64-bit environment. 64-bit data models Converting application software written in a high-level language from a 32-bit architecture to a 64-bit architecture varies in difficulty. One common recurring problem is that some programmers assume that pointers (variables that store memory addresses) have the same length as some other data type. Programmers assume they can transfer quantities between these data types without losing information. Those assumptions happen to be true on some 32 bit machines (and even some 16 bit machines), but they are no longer true on 64 bit machines. The C programming language and its descendant C++ make it particularly easy to make this sort of mistake. To avoid this mistake in C and C++, the sizeof operator can be used to determine the size of these primitive types if decisions based on their size need to be made at run time. Also, the CHAR_BITS) is by itself not defined the same way in all implementations of C or C++.One needs to be careful to use the ptrdiff_t type (in the standard header uintptr_t where available (it is only defined in C99, but some compilers otherwise conforming to an earlier version of the standard offer it as an extension).Neither C nor C++ define the length of a pointer, int, or long to be a specific number of bits. In most programming environments on 32 bit machines, pointers, "int" variables, and "long" variables, are all 32 bits long. However, in many programming environments on 64-bit machines, "int" variables are still 32 bits wide, but "long"s and pointers are 64 bits wide. These are described as having an LP64 data model. Another alternative is the ILP64 data model in which all three data types are 64 bits wide. However, in most cases the modifications required are relatively minor and straightforward, and many well-written programs can simply be recompiled for the new environment without changes. Another alternative is the LLP64 model that maintains compatibility with 32 bit code, by leaving both int and long as 32-bit. "LL" refers to the "long long" type, which is at least 64 bits on all platforms, including 32 bit environments. Most 64 bit compilers today use the LP64 model (including Solaris, AIX, HP, Linux, MacOS native compilers), Microsoft however decided to use the LLP64 model. Note that a programming model is a choice made on a per compiler basis, and several can coexist on the same OS. However typically the programming model chosen by the OS API as primary model dominates. Another consideration is the data model used for drivers. Drivers make up the majority of the operating system code in most modern operating systems (although many may not be loaded when the operating system is running). Many drivers use pointers heavily to manipulate data, and in some cases have to load pointers of a certain size into the hardware they support for DMA. As an example, a driver for a 32-bit PCI device asking the device to DMA data into upper areas of a 64-bit machine's memory could not satisfy requests from the operating system to load data from the device to memory above the 4 gigabyte barrier, because the pointers for those addresses would not fit into the DMA registers of the device. This problem is solved by having the OS take the memory restrictions of the device into account when generating requests to drivers for DMA. Current 64-bit microprocessor architectures 64-bit microprocessor architectures (as of 2006) include: Most 64-bit processor architectures can execute code for the 32-bit version of the architecture natively without any performance penalty. This kind of support is commonly called biarch support or more generally multi-arch support. Beyond 64 bits 64-bit words seem to be sufficient for most practical uses today (c. 2006). Still, it should be mentioned that IBM's System/370 used 128-bit floating point numbers, and many modern processors also include 128-bit floating point registers. The System/370 was notable, however, in that it also used variable-length decimal numbers of up to 16 bytes (i.e. 128-bit). IBM's OS/400 has for years used 128-bit pointers. Applications are designed to run on a virtual machine, then converted to the native instruction set when installed. The original hardware was a 32-bit CISC system similar to the System/370, while the current hardware is 64-bit PowerPC. This makes a future transition of OS/400 to 128-bits painless. IPV6 addresses are 128 bits long. Processors that can manipulate a 128 bit integer would be helpful when dealing with IPV6 addresses. See rfc1924 section 7. Images In digital imaging, 64-bit refers to 48-bit images with a 16-bit alpha channel. See also | |||||||
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